Design-Reuse

Lattice Announces Low-Cost FPGA Based ADC Interface Reference Design Solution

LatticeECP2/M FPGA Interface to Texas Instruments’ADS6000 ADC Family Delivers Exceptional Performance and Value HILLSBORO, OR - JANUARY 14, 2008 - Lattice Semiconductor Corporation (NASDAQ: LSCC) ...
CNBC

Analog Devices Simplifies High-Speed Data Converter-to-FPGA Interconnect Design Environment

New AD9250 dual-channel, 14-bit, 250-MSPS, A/D converter with JESD204B-compatible output connects seamlessly to high-speed FPGAs and enables precise multi-channel converter synchronization. NORWOOD, ...
EDN

The design of LVDS interface for a Multi-Channel A/D Converter

This article analyzes system design specifications for a low-voltage differential serial output interface of a multi-channel, high-speed analog-to-digital (A/D) converter. Maximum data speed is ...
Design-Reuse

Understanding Interface Analog-to-Digital Converters (ADCs) with DataStorm DAQ FPGA

Analog-to-Digital Converter (ADC) is used for the conversion of analog signals such as voltage to digital form so that they can be read and processed by a microcontroller or microprocessor. The user ...
Electronic Design

Pair The Right JESD204B Converter With Your FPGA

With more analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) now supporting the latest JESD204B serial interface standard, questions are arising about the best way to ...
Electronic Design

Using An SPI Interface To Improve FPGA Routing

Using SPI interface to free FPGA routing resources is allowing over 90% utilization, fast timing closure and supports modular design approach without consequences. When doing designs with FPGA you are ...
Europa Press

ARM7-Based MCU With FPGA Interface to Multi-Layer AHB

-- Offers seamless migration to CAP7 customizable MCUs for ARM7-plus-FPGA designs Atmel(R) Corporation (Nasdaq: ATML) today announced the AT91CAP7E, the industry's first ARM7(TM)-based MCU with a ...
EDN

The design of LVDS interface for a Multi-Channel A/D Converter

This article analyzes system design specifications for a low-voltage differential serial output interface of a multi-channel, high-speed analog-to-digital (A/D) converter. Maximum data speed is ...