Electronic Design

64-bit Floating Point Coprocessor Supports IEEE 754 Calculations

The uM-FPU64 floating point coprocessor chip provides support for IEEE 754-compatible, 64-bit floating point and integer calculations, expanded digital I/O, and analog input capabilities as well as ...
Electronic Design

HPC And “Big Data” Apps Tap Floating-Point Number Compression

Floating-point values contain three fields: a sign bit, exponent bits, and significand or mantissa bits. The IEEE-754 floating-point number format defined a common floating-point format that most ...
Hackaday

IEEE 754

Although something that’s taken for granted these days, the ability to perform floating-point operations in hardware was, for the longest time, something reserved for people with big wallets. This ...
Design-Reuse

Single- and double-precision IEEE-754 floating-point unit

The GRFPU is an IEEE-754 compliant floating-point unit, supporting both single and double precision operands. The pipelined design combines high throu ...
EDN

Tutorial: Floating-point arithmetic on FPGAs

[Editor's note: For an intro to fixed-point math, see Fixed-Point DSP and Algorithm Implementation. For a comparison of fixed- and floating-point hardware, see Fixed vs. floating point: a surprisingly ...
Design-Reuse

How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs

Here we provide rational for using Centar’s floating-point IP core for the new Altera Arria 10 and Stratix 10 FPGA platforms. After a short contextual discussion section, a comparison of various FFT ...