EDN

An FPGA-to-ASIC case study for refining smart meter design

Many embedded system designs are first implemented using FPGAs. This may be for quicker prototyping or to provide a platform for software development. Sometimes, the FPGAs will remain in the design ...
EDN

An FPGA primer for ASIC designers

With the advent of new technologies in IC design and complexity of the business models, chip designers may want to explore different choices available to them for implementation. ASICs have been the ...
The Next Platform

FPGA Based Deep Learning Accelerators Take on ASICs

Over the last couple of years, the idea that the most efficient and high performance way to accelerate deep learning training and inference is with a custom ASIC—something designed to fit the specific ...
AV Network

Justin Kennington on AV Supply Chain Using FPGA vs. ASIC Chips

SDVoE Alliance President, Justin Kennington shares his perspective on how FPGA versus ASIC chips impacts the product supply chain in the AV industry. When you purchase through links on our site, we ...
Business Wire

Faraday Unveiled FPGA-Go-ASIC Prototyping Platform to Accelerate FPGA-to-ASIC Conversion

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today unveiled its FPGA-Go-ASIC™ prototyping platform solution. This ...
Electronic Design

Structured ASICs Plan To Outpace FPGAs

Although it lacks the reprogrammability of an FPGA, this structured ASIC promises to deliver 350 MHz of system performance, densities of up to 2.2 million ASIC gates, and 8.8 Mb of memory. System ...
Electronic Design

Structured ASICs Compete With, And Complement, FPGAs

Once the prototyping and beta testing is done and a system goes into production, designers often will wonder: "With the higher per-chip cost of an FPGA, why not replace the FPGA with an ASIC?" But the ...
Semiconductor Engineering

FPGA And System Designs Get To Market Faster Leveraging ASIC-Proven Analysis Tools

Digital systems need clocks. Today’s designs require more from clocking schemes than ever before, and it’s likely this trend will continue. Increasing power constraints have resulted in finer-grained ...
Digi Times

FPGA vs ASIC: Altera CEO highlights FPGA's advantage in AI era

Embedded World 2025 officially commenced this week in Nuremberg, Germany, with Sandra Rivera, CEO of FPGA company Altera, delivering the keynote address. In her presentation, Rivera discussed key ...
Design-Reuse

ON Semiconductor Delivers Structured ASIC Technology for Military and Aerospace SoCs and FPGA-to-ASIC Conversions

PHOENIX -- March 18, 2008 -- ON Semiconductor, a global leader in power management solutions, has announced that XPressArray-II (XPA-II), a leading structured ASIC technology formerly offered by AMI ...
Design News

Is Platypus from Zero ASIC the FPGA equivalent to RISC-V?

Before I tell you what I’m about to tell you, let’s first refresh our minds as to RISC-V processors. Why? Well, because even though what I’m about to tell you has nothing to do with RISC-V per se, in ...
Business Wire

BitHull Overtakes ASIC Market with New FPGA Miners

COPENHAGEN, Denmark--(BUSINESS WIRE)--BitHull S.A. ( www.BitHull.com) is pleased to announce the launch of its two new crypto miners BH Miner and BH Miners Box. These miners have been built around ...